The present invention relates to a digital to analog converter (DAC), and more particularly, to a DAC DC offset calibration method and related apparatus.
Generally speaking, no matter what kind of modulation scheme is employed in a communication system, a digital to analog converter (DAC) is always utilized to convert a digital modulated signal into an analog signal for transmission. When designing a communication system, it is usually assumed that the used DAC is an ideal component. That is, the used DAC is regarded as an ideal DAC, which convert a digital signal into a corresponding analog signal without distortion.
However, due to environmental temperature variations or manufacturing process variations, most real world DAC cannot be assumed to be ideal components. A non-ideal effect a realistic DAC has is called a “DC offset effect”, which makes the conversion curve of the DAC become erroneous. Please refer to FIG. 1, which illustrates the relationship between a digital input x and an analog output y of a DAC. Ideally, a DAC has a conversion curve of the solid line in FIG. 1, which passes through the origin of coordinates. However, the DC offset effect makes the conversion curve deviate from the origin of coordinates and become the dashed line in FIG. 2. In other words, even if the digital input x of the realistic DAC equals to zero, the analog output y of the realistic DAC is still a non-zero value. The non-zero value is called the DC offset value yD of the realistic DAC. The DC offset value yD deteriorates the signal transmission quality and downgrades the performance of the communication system employing the realistic DAC. For some kinds of communication systems demanding high signal transmission quality, the DC offset effect is a problem that must be solved.
To avoid the problems caused by the DC offset effect, two compensation schemes can be used, one of which compensates on the digital input of the DAC, the other compensates on the analog output of the DAC. Since the digital compensation scheme provides relatively stable and accurate results, it is always adopted to eliminate the DC offset effect.
Basically, DACs on different chips always have different DC offset values. Even for a single DAC, it is also possible that the DAC has different DC offset values at different times. Hence, the optimal solution is to calibrate the DAC in advance every time before the apparatus employing the DAC is going to be used. If the apparatus is a transceiver capable of transmitting and receiving, an analog to digital converter (ADC) set in the receiving path of the transceiver can be utilized as an auxiliary tool to measure the DC offset value of the DAC.
In actuality, not only the DACs have non-ideal DC offset effects, but the ADCs are also faced with non-ideal DC offset effects. Hence the realistic conversion equations of a realistic DAC and ADC are as shown by the following equation (1) and equation (2) respectively:y=ρYX·(x−xC)  (1);z=ρZY·y+zD  (2);
where x represents the digital input of the DAC; y represents the analog output of the DAC or the analog input of the ADC; ρYX represents the slope of the DAC conversion curve; xC and zD represent the DC offset effects of the DAC and the ADC respectively.
It is quite a simple job to measure the DC offset value zD of an ADC. Connecting the input end of the ADC to ground, the outputted digital value would be the DC offset zD of the ADC. On the other hand, for measuring the xC value, the conventional method connects the output end of the DAC to the input end of the ADC, applies a digital value ‘0’ to the DAC, and measures the digital output zE of the ADC. The following equation (3) is then obtained:zE=ρZY·ρYX·(0−xC)+zD=−ρZX·xC+zD  (3);
where ρZX=ρZY·ρYX.
Since different chips have different ρZX values, the conventional method measures the actual ρZX values of a lot of sample chips to determine an average ρZX value. The determined average ρZX value is then set in many different systems as a predetermined calibration parameter. With the predetermined calibration parameter ρZX and the given values zE and zD, each unique system can determine the DC offset value xC of its DAC. Using the determined DC offset value xC to calibrate digital input signal of the DAC, the DC offset effect is eliminated. The equation for determining xC is as shown by the following equation (4):xC=(zD−zE)/ρZX  (4).
However, the above-mentioned conventional method has a few drawbacks. First of all, a lot of sample chips must be used be used to determine the average ρZX value. Then, for each chip, it is still possible that an error exist between the actual ρZX value and the average ρZX value. If the error does exist, using the average ρZX value, as a predetermined calibration parameter ρZX might not be able to eliminate the DC offset effect of the DAC.